ICASSP99 DSP Tools and Rapid Prototyping

DSP Tools and Rapid Prototyping
Home Full List of Titles 1: Speech Processing CELP Coding Large Vocabulary Recognition Speech Analysis and Enhancement Acoustic Modeling I ASR Systems and Applications Topics in Speech Coding Speech Analysis Low Bit Rate Speech Coding I Robust Speech Recognition in Noisy Environments Speaker Recognition Acoustic Modeling II Speech Production and Synthesis Feature Extraction Robust Speech Recognition and Adaptation Low Bit Rate Speech Coding II Speech Understanding Language Modeling I 2: Speech Processing, Audio and Electroacoustics, and Neural Networks Acoustic Modeling III Lexical Issues/Search Speech Understanding and Systems Speech Analysis and Quantization Utterance Verification/Acoustic Modeling Language Modeling II Adaptation /Normalization Speech Enhancement Topics in Speaker and Language Recognition Echo Cancellation and Noise Control Coding Auditory Modeling, Hearing Aids and Applications of Signal Processing to Audio and Acoustics Spatial Audio Music Applications Application - Pattern Recognition & Speech Processing Theory & Neural Architecture Signal Separation Application - Image & Nonlinear Signal Processing 3: Signal Processing Theory & Methods I Filter Design and Structures Detection Wavelets Adaptive Filtering: Applications and Implementation Nonlinear Signals and Systems Time/Frequency and Time/Scale Analysis Signal Modeling and Representation Filterbank and Wavelet Applications Source and Signal Separation Filterbanks Emerging Applications and Fast Algorithms Frequency and Phase Estimation Spectral Analysis and Higher Order Statistics Signal Reconstruction Adaptive Filter Analysis Transforms and Statistical Estimation Markov and Bayesian Estimation and Classification 4: Signal Processing Theory & Methods II, Design and Implementation of Signal Processing Systems, Special Sessions, and Industry Technology Tracks System Identification, Equalization, and Noise Suppression Parameter Estimation Adaptive Filters: Algorithms and Performance DSP Development Tools VLSI Building Blocks DSP Architectures DSP System Design Education Recent Advances in Sampling Theory and Applications Steganography: Information Embedding, Digital Watermarking, and Data Hiding Speech Under Stress Physics-Based Signal Processing DSP Chips, Architectures and Implementations DSP Tools and Rapid Prototyping Communication Technologies Image and Video Technologies Automotive Applications / Industrial Signal Processing Speech and Audio Technologies Defense and Security Applications Biomedical Applications Voice and Media Processing Adaptive Interference Cancellation 5: Communications, Sensor Array and Multichannel Source Coding and Compression Compression and Modulation Channel Estimation and Equalization Blind Multiuser Communications Signal Processing for Communications I CDMA and Space-Time Processing Time-Varying Channels and Self-Recovering Receivers Signal Processing for Communications II Blind CDMA and Multi-Channel Equalization Multicarrier Communications Detection, Classification, Localization, and Tracking Radar and Sonar Signal Processing Array Processing: Direction Finding Array Processing Applications I Blind Identification, Separation, and Equalization Antenna Arrays for Communications Array Processing Applications II 6: Multimedia Signal Processing, Image and Multidimensional Signal Processing, Digital Signal Processing Education Multimedia Analysis and Retrieval Audio and Video Processing for Multimedia Applications Advanced Techniques in Multimedia Video Compression and Processing Image Coding Transform Techniques Restoration and Estimation Image Analysis Object Identification and Tracking Motion Estimation Medical Imaging Image and Multidimensional Signal Processing Applications I Segmentation Image and Multidimensional Signal Processing Applications II Facial Recognition and Analysis Digital Signal Processing Education Author Index A B C D E F G H I J K L M N O P Q R S T U V W X Y Z	C/C++ Compiler Support for Siemens TriCore DSP Instruction Set Authors: Hao Shi, Roger Arnold, Karl Westerholz, Page (NA) Paper number 1108 Abstract: How to make compilers more useful for developing DSP applications and reduce reliance on assembly coding has long been a topic of interest in the DSP community. This paper presents Siemens solutions for supporting its TriCore DSP/microcontroller architecture, including SIMD instructions, at the C/C++ level. Two solutions based on either extending C/C++ language with the new built-in DSP data types or developing an external DSP class library are investigated. First cut implementations of both methods have achieved 80% coverage of the TriCore instruction set, which is 30 percent higher than the coverage before DSP support was added. IC991108.PDF (From Author) IC991108.PDF (Rasterized) TOP A Simple, Non-Invasive Probe for Reconstructing Signals Inside a DSP Authors: Edwin A. Suominen, Page (NA) Paper number 5066 Abstract: A simple, non-invasive probe is proposed that extracts digital samples of a signal of interest from a DSP and reconstructs the samples into an equivalent analog signal. The probe is useful for software design and debugging as well as troubleshooting and verification of DSP systems in the field. A sample buffering system ensures that the digital samples are reconstructed into analog at substantially constant intervals, even if the DSP generates the digital samples at varying intervals. The buffering system uses a control loop to generate the analog samples at a sample rate that is equivalent to the mean sample rate of the digital samples. Consequently, the reconstructed analog signal accurately represents the digital signal found within the DSP. This signal may then be sent to conventional test equipment suited for analysis of analog signals. Details beyond the scope of this paper may be found at http://eepatents.com/probe. IC995066.PDF (From Author) IC995066.PDF (Rasterized) TOP Source-Level Loop Optimization for DSP Code Generation Authors: Bogong Su, Jian Wang, Andrew Esguerra, Page (NA) Paper number 1270 Abstract: The performance of current C compilers for DSP is almost unacceptable. One of the most important reasons is the lack of implementing software pipelining. This paper presents a remedy called source-level loop optimization. DSP programmers can use source-level loop optimization first then input its result to the DSP compiler to obtain better assembly code. The implementation of source-level loop optimization is easier than that of software pipelining. The preliminary result with the DSP compiler-challenge C code shows that source-level loop optimization is a portable and efficient approach. The detailed method and working examples are presented. IC991270.PDF (From Author) IC991270.PDF (Rasterized) TOP A Complete Development Environment for Image Processing Applications on Adaptive Computing Systems Authors: Alan Christopher Moorman, Donald M Cates Jr, Page (NA) Paper number 2080 Abstract: Adaptive computing has always been a topic of great interest, providing a means to automatically map an application to specific hardware. The hardware may be configured to a specific application, thereby providing optimal performance. However, the largest benefit is that this configuration may be performed optimally during program execution. Unfortunately, adaptive computing is a relatively new area of research, therefore imposing serious complications when developing applications for adaptive hardware. This problem limits ACS development to hardware experts, prohibiting application specialists, such as image processing experts, from utilizing these systems. This paper will discuss a development environment that can bring the world of ACS application development to the IP expert with minimal hardware knowledge. IC992080.PDF (From Author) IC992080.PDF (Rasterized) TOP A Floating-point to Integer C Converter with Shift Reduction for Fixed-point Digital Signal Processors Authors: Ki-Il Kum, Jiyang Kang, Wonyong Sung, Page (NA) Paper number 2313 Abstract: A floating-point to integer C program translator is developed for convenient programming and efficient use of fixed-point programmable digital signal processors (DSP's). It not only converts data types and supports automatic scaling, but also conducts shift optimization to enhance execution speed. Since the input and output of this translator are ANSI C compliant programs, it can be used for any fixed-point DSP that supports ANSI C compiler. A shift reduction method is developed for minimizing the scaling overhead of translated integer C programs. It considers the data-path of a target processor and profiling results. Using the shift reduction method, 4% to 37% speedup is obtained. The translated integer C codes are 20 to 400 times faster than the floating-point versions when applied to TMS320C50, TMS320C60 and Motorola 56000 DSP's. IC992313.PDF (From Author) IC992313.PDF (Rasterized) TOP Rapid Design of Discrete Orthonormal Wavelet Transforms Using Silicon IP Components Authors: Shahid Masud, John V. McCanny, Page (NA) Paper number 1056 Abstract: A rapid design methodology for orthonormal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture utilising time-interleaved coefficients for the wavelet transform filters. The architecture has been captured in VHDL and parameterised in terms of wavelet family, wavelet type, data word length and coefficient word length. The control circuit is embedded within the cores and allows them to be cascaded without any interface glue logic for any desired level of decomposition. Case studies for stand alone and cascaded silicon cores for single and multi-stage wavelet analysis respectively are reported. The design time to produce silicon layout of a wavelet based system has been reduced to typically less than a day. The cores are comparable in area and performance to hand-crafted designs. The designs are portable across a range of foundries and are also applicable to FPGA and PLD implementations. IC991056.PDF (From Author) IC991056.PDF (Rasterized) TOP Rapid Prototyping Library For Adaptive Signal Processing Applications Authors: Timothy Bigg, John Owen, Robert W Stewart, Daniel García-Alís, Moritz Harteneck, Marc Llovet-Vilà, Page (NA) Paper number 1264 Abstract: In this paper we present an adaptive signal processing library for the rapid prototyping of adaptive signal processing algorithms, architectures and applications. The library is hosted by the DSP simulation software SystemView and covers virtually the complete spectrum of linear, and non-linear adaptive algorithms currently in use in contemporary DSP and communications applications. The library can be easily used with real signals, with variable system wordlengths, sampling frequencies and so on. Therefore in this paper we will briefly discuss the design philosphy behind the library and present a number of rapidly developed adaptive algorithm simulations to demonstrate the library versatility. Simulations for active noise control, adaptive mobile channel DFEs (Decision Feedback Equalisers), adaptive multiuser CDMA (Code Division Multiple Access) receivers, and subband adaptive filters for acoustic echo control are discussed in this paper. Copies of the library and example files can be downloaded from the web following the instructions in the full paper. IC991264.PDF (From Author) IC991264.PDF (Rasterized) TOP Rapid Prototyping of Multimedia Chip Sets Authors: Mohamed S Ben-Romdhane, Marius Vassiliou, Lan-Rong Dung, Page (NA) Paper number 3017 Abstract: We have developed a rapid prototyping environment for Multimedia applications. The design environment is based on efficient hardware and software reuse, abstraction, design parameterization, and automation. The design methodology maintains a flexible boundary between hardware and software by eliminating hardware fabrication from the design loop. A reusable Hardware/Software library for video compression has been developed to support the design methodology. We present a case study involving the design of an H.263-based video decoder. This case study illustrates the efficiency and flexibility of the design methodology. IC993017.PDF (From Author) IC993017.PDF (Rasterized) TOP An Interactive Tool for Bit Error Rate Analysis of Speech Coding Algorithms Authors: Hiren C Bhagatwala, Edward M Painter, Andreas S Spanias, Page (NA) Paper number 3024 Abstract: A GUI-based software tool that provides a framework for evaluation of different speech coding algorithms is presented. The tool is designed to measure the susceptibility of speech coding algorithms to errors added on the encoded bit-stream during transmission. In particular, the errors can be added individually to each parameter that comprise the encoded bit-stream. This enables a designer of a speech codec to evaluate its performance under adverse or impaired channel conditions. Various features of this interactive software are described in this paper. The tool is designed to be universally applicable to different speech coding algorithms, by means of a bit-stream definition file. This interactive tool has been used for evaluation of a number of standardized speech coding algorithms. Results from this study are also presented. IC993024.PDF (From Author) IC993024.PDF (Rasterized) TOP