Title:    DSP Architectures   (Lecture)

Time: Friday, March 19, 9:30 AM - 11:30 AM

Location:    Tucson 4

Chair: Mohammad Ibrahim    (DeMontfort University)

9:30 AM    DISPS-3.1
A New Scalable DSP Architecture for System on Chip (SoC) Domains
Matthias H Weiss, Frank Engel, Gerhard P Fettweis (Mobile Communications Systems Chair, EE, UoT Dresden)
[abstract]  [manuscript]

9:45 AM DISPS-3.2
A New Flexible Architecture for Variable Length DCT Targeting Shape-Adaptive Transform
Thuyen Le, Manfred Glesner (Darmstadt University of Technology, Germany)
[abstract]  [manuscript]

10:00 AM DISPS-3.3
An adaptive block-matching algorithm for motion estimation
Vasily G. Moshnyaga (Fukuoka University)
[abstract]  [manuscript]

10:15 AM DISPS-3.4
Hardware Architecture for Real-Time Distance Transform
Jarmo H Takala (Tampere University of Technology), Jouko O Viitanen (VTT Automation), Jukka P.P Saarinen (Tampere University of Technology)
[abstract]  [manuscript]

10:30 AM DISPS-3.5
AN EFFICIENT VLC DECOMPRESSION SCHEME FOR USER-DEFINED CODING TABLES
Bai_Jue Shieh, Chen-Yi Lee (Department of Electronics Engineering, National Chiao Tung University)
[abstract]  [manuscript]

10:45 AM DISPS-3.6
AN ANALOG ASSOCIATIVE MEMORY CHIP FOR VQ IMAGE COMPRESSION
Loris Navoni, Monica Besana, Pier Luigi Rolandi (STMicroelectronics)
[abstract]  [manuscript]

11:00 AM DISPS-3.7
A VLSI IMPLEMENTATION OF A REVERSIBLE VARIABLE LENGTH ENCODER/DECODER
Mario Novell (Electrical Engineering Department, University of California, Los Angeles), Steve Molloy (Luxxon Corporation)
[abstract]  [manuscript]

11:15 AM DISPS-3.8
Parametric Spectral Estimation on a Single FPGA
Stephen J Bellis, William P Marnane (National Microelectronics Research Centre, University College Cork), Peter J Fish (School of Electronic Engineering & Computer Systems, University of Wales, Bangor)
[abstract]  [manuscript]

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Last Update: February 4, 1999 Ingo Höntsch