3:30, DISPS-L1.1
COST-EFFICIENT MULTIPLIER-LESS FIR FILTER STRUCTURE BASED ON MODIFIED DECOR TRANSFORMATION
I. LEE, C. WU, A. WU
In this paper, we propose a new design approach to implement FIR filter using CSD multipliers based on Modified Decorrelating transformation (MDECOR). The direct CSD approach will introduce serious quantization errors since the distribution of CSD numbers is very non-uniform. The proposed MDECOR tranformation provides a systematic solution to reduce the dynamic range effectively. By combining the proposed MDECOR transformation followed by CSD quantization, we can avoid the aforementioned quantization problem. As a result, we do not need to employ additional non-zero bits to compensate for the distortion caused by direct CSD quantization, which helps to save the number of adders in VLSI implementations. Furthermore, the MDECOR transformation offers more design of freedom in the filter design. It can achieve high-precision performance under the same hardware complexity as the direct CSD approach. Our simulation results show that we can save 20% number of adders compared with the direct CSD approach.

3:50, DISPS-L1.2
IMPROVING THE NEAR-PERFECT HYBRID FILTER BANK PERFORMANCE IN THE PRESENCE OF REALIZATION ERRORS
M. PINHEIRO, P. BATALHEIRO, A. PETRAGLIA, M. PETRAGLIA
Hybrid filter banks have received increasing attention in the literature, for applications such as high-speed, high-resolution A/D and D/A converter design. In the manufacturing process, however, the filter coefficients of a hybrid filter bank are plagued with some errors due to technological limitations, particularly those of the analog filters, leading to degradation of the system performance. This work presents a novel method for improving the mean signal-to-noise-ratio of near-perfect reconstruction filter banks, taking into account such realization errors. The method consists in minimizing the total noise energy derived in an accurate way by a theoretical expression.

4:10, DISPS-L1.3
PARALLELIZABLE EIGENVALUE DECOMPOSITION TECHNIQUES VIA THE MATRIX SECTOR FUNCTION
M. HASAN, A. HASAN
Many modern high-resolution spectral estimators in signal processing and control make use of the subspace information afforded by the singular value decomposition of the data matrix, or the eigenvalue decomposition of the covariance matrix. The derivation of these estimators involves some form of matrix decomposition. In this paper, new computational techniques for obtaining eigenvalues and eigenvectors of a square matrix are presented. These techniques are based on the matrix sector function which can be applied to break down a given matrix into matrices of smaller dimensions and consequently this approach is suitable for parallel implementation. Finally, an example which illustrates the proposed method is provided.

4:30, DISPS-L1.4
RATIONAL AND RADICAL FIXED POINT FUNCTIONS FOR THE EIGENVALUE PROBLEM AND POLYNOMIALS
J. HASAN, M. HASAN
The derivation and implementation of many algorithms in signal/image processing and control involve some form of polynomial root-finding and/or matrix eigendecomposition. In this paper, higher order fixed point functions in rational and/or radical forms are developed. This set of iterations can be considered as extensions of known methods such as Newton's, Lagurre's and Halley's methods and can be applied to compute all zeros of a polynomial as well as all eigenvalues of a complex matrix. One of the main features of the proposed agorithms is that they could have any predetermined rate of convergence regardless of the multiplicity of the zeros or eigenvalues. Finally, eigenvalues and eigenvectors are computed using fast matrix inverse free algorithms which are based on the QR factorization.

4:50, DISPS-L1.5
PIPELINED ARCHITECTURES FOR THE TD-LMS ADAPTIVE FILTER
G. GLENTIS
PIPELINED ARCHITECTURES FOR THE TD-LMS ADAPTIVE FILTER George-Othon Glentis Technological Education Institute of Krete, Branch at Chania Department of Electronics, 3, Romanou Str, Chalepa 73133 Chania, Krete, Greece. e-mail: gglentis@chania.teiher.gr ABSTRACT In this paper, efficient pipelined architectures for the implementation of the Transform Domain LMS algorithm, are presented. Pipelining of the TD-LMS algorithm is achieved by introducing an amount of time delay into the original adaptive scheme. The adaptation delay introduced to the TD-LMS algorithm allows for the development of pipelined architectures. By retiming the delays existing in the error feedback loop, two efficient pipelined implementations of the delayed TD-LMS algorithm are developed.

5:10, DISPS-L1.6
CANONIC LOOK AHEAD: CRITICAL CYCLE RELAXED IIR FILTERING WITH MINIMUM MULTIPLICATIVE COMPLEXITY
J. RUBIO-FERNANDEZ, J. SALA-ALVAREZ, F. NUNEZ
In this paper we present an architecture to relax the critical cycle associated with the feedback operations in IIR filtering when high sampling frequencies exceed the computation bandwidth of digital arithmetics. Its complexity, evaluated in terms of multiplications per output sample per pole, equals that of the canonic IIR recursion and provides considerable savings in comparison to existing techniques such as Clustered and Scattered Look Ahead. The procedure is shown to yield unconditionally stable implementations. The procedure is based on defining a suitable polyphase architecture for the recursive computations in IIR filtering. The decimation associated with polyphase schemes splits the original high-speed sample stream into parallel low-speed decimated streams that can be processed at the working rate of arithmetics. Operations are mapped to the polyphase architecture so that, asymptotically, no increase in redundant multiplications is incurred.