1:00, ITT-P1.1
MULTIRESOLUTION MRF-BASED TEXTURE SEGMENTATION USING THE WREATH PRODUCT TRANSFORM PHASE
G. MIRCHANDANI, X. LUO
In this paper, we bring local phase and multiresolution analysis to the texture segmentation problem. A Markov random field characterization is still employed, except it is used to model phase correlations rather than intensity correlations. Since statistical characteristics of phase are typically quite different to those of intensity, there exists the potential for creating greater discrimination in its feature space. We apply the Wreath Product Transform and use the phase at higher scales to initiate the segmentation process. For textures defined by homogeneous regions of dominant local edges, we see that the new algorithm yields better segmentation than that obtained through conventional multiresolution algorithms based on lowpass data.

1:00, ITT-P1.2
LOGO INSERTION IN MPEG TRANSCODER
K. PANUSOPONE, X. CHEN, F. LING
Various studies show that a basic architecture of MPEG-2 transcoder consists of a cascaded decoder/encoder. Such a transcoder re-uses the motion vectors (MVs) and minimizes the changes of macroblock (MB) mode. One interesting feature that can be added on this type of transcoder is to insert a translucent logo into the transcoded bit-stream.

1:00, ITT-P1.3
HIGH-QUALITY AND PROCESSOR-EFFICIENT IMPLEMENTATION OF AN MPEG-2 AAC ENCODER
Y. TAKAMIZAWA, T. NOMURA, M. IKEKAWA
Presented here is MPEG-2 AAC LC Profile encoder software for an Intel Pentium III processor. MDCT and quantization processing are accelerated by the use of SIMD instructions. Psycho-acoustic analysis in the MDCT domain makes the use of FFTs unnecessary. Better sound quality is provided by greater efficiency in quantization processing and Huffman coding. All of this results in high-quality and processor-efficient implementation of an MPEG-2 AAC encoder. Sound quality achieved at 96 kbps/stereo is significantly better than that of MP3 at the same bitrate. The encoder works 13 times faster than realtime for stereo encoding on an 800MHz Pentium III processor.

1:00, ITT-P1.4
DESIGN OPTIMIZATION OF MAIN-PROFILE MPEG-2 AAC DECODER
K. BANG, N. JEONG, Y. PARK, D. YOUN
In this paper, a system architecture optimized for the 2-channel main-profile MPEG-2 AAC decoder is presented. In order to enable an efficient job scheduling and allocation, the presented system comprises three hardware modules: Huffman decoder module, predictor module, and processing core module which is programmable using an assembly language of its own. Huffman decoder is designed to finish the requested job in only 1 clock cycle time and the predictor forms parallel processing with other modules, so that utilization of the system resource is maximized. The developed system has been coded in VHDL and MPEG-2 AAC decoding algorithm is programmed using the assembly of the processing core. For the verification of decoding algorithm, the 16-bit PCM output of the system was compared with the result of the floating-point simulation, and the result showed the maximum of 2-bit difference. Functional simulation verified that the developed system can decode standard MPEG-2 AAC main-profile bitstreams in real-time with high accuracy.

1:00, ITT-P1.5
ON-LINE SIGNATURE VERIFICATION ALGORITHM INCORPORATING PEN POSITION, PEN PRESSURE AND PEN INCLINATION TRAJECTORIES
D. SAKAMOTO, H. MORITA, T. OHISHI, Y. KOMIYA, T. MATSUMOTO
A new algorithm is proposed for pen-input on-line signature verification incorporating pen-position, pen-pressure and pen-inclinations trajectories. Preliminary experimental result looks encouraging.

1:00, ITT-P1.6
CHAOTIC ALGORITHMS FOR DATA ENCRYPTION
M. SOBHY, A. SHEHATA
Abstract: A system of encryption based on chaotic algorithms is described. The system is used for encrypting text and image files for the purpose of creating secure data bases and for sending secure email messages. The system is also implemented on an FPGA for real-time applications. Levels of security several orders of magnitude better than published systems have been achieved.

1:00, ITT-P1.7
METHOD OF ATTACKING CHAOTIC ENCRYPTION AND COUNTERMEASURES
M. SOBHY, A. SHEHATA
Abstract: Methods of attacking chaotic encryption algorithms have been developed. These methods have been applied to all the published chaotic encryption systems and all these systems are broken in very short computer times. Counter measures have also been developed in order to make chaotic encryption secure. Several examples and results are given.

1:00, ITT-P1.8
DSP APPLICATION IN E-COMMERCE SECURITY
J. HU, Z. XI, A. JENNINGS, H. LEE, D. WAHYUDI
This is a case study on using DSP board to construct an encryption/decryption module embedded in a E-Commerce web server. The idea of using DSP is to push beyond the key length limits of encryption/decryption algorithms and computational power in software environment while avoiding the heavy investment in dedicated hardware encryptor/encryptor. The low cost, high computational power, high flexibility of DSP and the ubiquitous availability of PC PCI (peripheral component interconnect) slot for DSP can provide any web browser or web server an excellent cost-effective option to improve the security level of Internet applications. The paper provides a step-by-step procedure and reveals every detail of a successful implementation of DSP RSA encryptor/decryptor for a E-commerce web server by using the latest TMS320C6000 Evaluation Module (EVM) DSP hardware. A strong prime concept and Garner algorithm are introduced to generate more secure keys and compute encryption/decryption more efficiently than that of recent publications. Experiments show that the performance of using DSP hardware encryption can be 300 times faster than that in software environment.